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GPTs 目录2026-03-072+2026-07-27
CMOS Logic Schematic Designer
Generates CMOS schematic rules from boolean functions
- 评分
- 暂无评分记录
- 会话量
- 2+2
以下数据来自旧目录保存的采集记录，不代表实时使用量。
对话开场提示词
Convert (A+B)·C into CMOS schematic rules
Explain why PMOS is used in the pull-up network
Suggest CMOS rules for NOT(A+B)
How to arrange NMOS transistors for A·B+C
功能与能力
- 网页浏览
可在对话中浏览网络内容。
- 图像生成
可根据提示词生成图像。
- 文件上传
这个 GPT 支持上传文件。
历史会话量
查看采集记录 (6)
| 采集日期 | 会话量 |
|---|---|
| 2 | |
| 2 | |
| 2 | |
| 2 | |
| 2 | |
| 2 |
使用示例与公开对话
- 暂无已保存的公开示例对话。
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